XSEDE12

TUTORIAL: Preparing for Stampede: Programming Heterogeneous Many-Core Supercomputers

ABSTRACT: The next round of supercomputing technology will feature heterogeneous architectures with many-core CPU and accelerator technologies. In the coming year, the Texas Advanced Computing Center (TACC) will deploy a 2PF Intel Sandy Bridge, 8PF Intel MIC Architecture hybrid cluster name Stampede, featuring hundreds of thousands of heterogeneous cores. This tutorial will introduce experienced C/C++ and Fortran programmers to techniques essential for preparing their scientific applications for future systems. These future architectures will support wider and more powerful SIMD vector units, so the first half of the tutorial will focus on understanding modern vector programming, compiler vectorization reports, solutions to common vectorization problems, and new ways to employ new SIMD instructions. The second half of the tutorial will concentrate on using OpenMP directives and tasks to exploit the parallelism inherent in high core-count processors and heterogenous systems. Hands-on exercises will be conducted. Motivating examples from Intel's future MIC Architecture will be presented.

PREREQUISITES: Parallel programming experience